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Dual Gate ClampDRIVE SiC FET Based Traction Inverter Design Demonstration
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| Author(s) |
Shusun QU, Anup BHALLA |
| Abstract |
The switching speed can be effectively adjusted by JFET gate resistor in the SiC cascode structure [1]. This adjustable switch speed is critical for traction inverter application to mitigate the overshoot, oscillation, and common mode leakage current. This work shows how to implement Qorvo dual gate top side cooled (TSC) SiC FET in traction inverter design to achieve the mentioned benefits. Test results justified this design approach. |
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| Filename: | 0495-epe2023-full-01254222.pdf |
| Filesize: | 959.8 KB |
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| Type |
Members Only |
| Date |
Last modified 2023-09-24 by System |
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