| Abstract |
This study focuses on the short-circuit type II safe operating area (SC-II SOA) with and without gate-emitter voltage clamping. The SC-II measurements without gate-emitter voltage (VGE) clamping show a reduced SC-II SOA at higher DC-link voltages induced by transient gate-emitter voltages that are far beyond the allowed level. These high transient gate voltages result in correspondingly high peak currents. As a consequence, they cause device failure during the negative (di\_C)/dt phase, which is induced by the inductive overvoltage. However, the SC-II SOA can be completely recovered to the level of the SC-I SOA by applying an appropriate VGE clamping circuit, although the IGBT will be subjected to harsher conditions in the SC-II event compared to the SC-I event. To understand the failure types observed in SC-II measurements with and without VGE clamping, computer-aided TCAD simulations were performed using a real front-side, trench-gate IGBT structure. |
