| Abstract |
High voltage power electronic devices undergo various stressors in their application environment, leading to long-term degradation and final catastrophic failure. This accumulated damage needs to be investigated during the development phase, as well as its impact on the device long-term performance. Therefore, power semiconductors should be subjected to repetitive stress testing in order to study the aging mechanisms as well as potential unknown failures before commercializing. Additionally, owing to manufacturing process variations and material tolerances, it is imperative to stress a sufficient number of devices for a meaningful statistical analysis. Taking into account these facts, this paper introduces a scalable reliability stress test system that covers various dynamic pulse stress scenarios, such as short circuit (SC), unclamped inductive switching (UIS) and double pulse testing (DPT), while assuring its robustness under worst-case conditions. |
