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   A GATE ARRAY DESIGN FOR PWM INVERTER CONTROL   [View] 
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 Author(s)   T. C. Green; B. W. Williams 
 Abstract   In order for induction motor drives to be competitive in the low power drives market an inexpensive control chip set must be developed. This paper presents a design philosophy for producing a single chip solution with a reduced silicon area. This involves reducing the amount of storage required for the reference waveform and simplifying the modulator circuitry. The compromises that are required in order to reach the solution are investigated and from this a design is evolved. The design is implemented using the latest ASIC technology - programmable gate arrays - as a proving stage for gate array production. The performance is assessed in terms of the frequency spectrum of the PWM waveforms and shown to be adequate for low cost, low power applications such as consumer goods. 
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Filesize:587.3 KB
 Type   Members Only 
 Date   Last modified 2021-02-23 by System