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   Power Devices and DC-Bus Voltage Utilization in NPDC Inverters   [View] 
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 Author(s)   M. E. Santos; S. M. Silva; B. J. Cardoso Filho 
 Abstract   In this paper PWM methods for neutral point diode clamped three-level inverters are analyzed focusing on power devices and DC-bus voltage utilization. For each PWM scheme considered, the conduction and switching losses are computed for all devices as a function of the modulation indexes and of the load power factor. Several modulation strategies are characterized in terms of DC-bus voltage utilization, total harmonic distortion of the output voltage and losses in the power devices. Simulation results are included to illustrate the impact of the PWM strategies in the inverter design. 
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Filename:EPE2001 - PP00768 - Cardoso.pdf
Filesize:112.7 KB
 Type   Members Only 
 Date   Last modified 2004-03-15 by System