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Optimization Design for SiC Drift Step Recovery Diode (DSRD)
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| Author(s) |
Xiaoxue YAN |
| Abstract |
A device structure optimization method is proposed for silicon carbide (SiC) DSRD. The bulk structure is determined by analyzing the influence of each structure parameter on the performance. For the termination structure, the 3-step etched-JTE is applied for the DSRD for the first time. The optimally designed 3-step JTE effectively reduces the peak electric field from 2.73 MV/cm to 0.95 MV/cm. In addition, the preparation process technology especially the microtrench phenomenon of SiC materials in inductively coupled plasma (ICP) etching is also studied. The samples with 1.2 kV breakdown voltage are fabricated and tested in the pulsed generation circuit. |
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| Filename: | 0095-epe2020-full-14570189.pdf |
| Filesize: | 694.4 KB |
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| Type |
Members Only |
| Date |
Last modified 2021-01-18 by System |
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