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Full-Silicon 98.7\% Efficient Three-Phase Five-Level 3-port UPS Architecture with Wide Voltage Range Battery based on Multiplexed Topology
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| Author(s) |
Kepa ODRIOZOLA |
| Abstract |
This paper proposes a new three-phase multilevel 3-port converter topology based on multiplexed topology concept which is especially intended for high-power Uninterruptible Power Supplies (UPS) applications with wide battery voltage range and well adapted for high-voltage step-down conversion ratio. Compared to other high-voltage conversion ratio Multi-Cell converters, the multiplexed concept allows cascading power conversion stages without any intermediate filter and optimizing power density. In the studied case it will be used to transfer power between a 1200V DC source and 400V/480V AC load and grid. The proposed converter topology achieves very high efficiency, up to 98,7\% in direct AC-to-AC power conversion mode using reduced number of silicon low blocking voltage semiconductor devices. The Hardware In the Loop (HIL) assessment has enabled the development of the modulation strategy and validate the performance of the converter. To validate the feasibility of the multiplexed concept of the 5L-Multiplexed 3-port topology for UPS applications a 100-kW hardware demonstrator featuring a volumetric power density of 3.68 kW/dm3 (60.3 W/in3) has been built. |
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| Filename: | 0140-epe2020-full-17113123.pdf |
| Filesize: | 6.199 MB |
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| Type |
Members Only |
| Date |
Last modified 2021-01-18 by System |
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