Please enter the words you want to search for:

[Return to folder listing]

   FPGA Implementation of Modified Space Vector Modulation (SVM) for High-Frequency Hybrid Active Neutral-Point-Clamped (NPC) Power Factor Correction Rectifier   [View] 
 [Download] 
 Author(s)   Mohammad NAJJAR 
 Abstract   This paper presents a model-based implementation of modified space vector modulation (SVM) for a three-level three-phase active neutral-point clamped (ANPC) rectifier. To optimize and reduce the number of high frequency active switches, this paper uses a hybrid modulation technique in which only two switches out of 6 active switches are switching at high frequency and the rest are working at fundamental frequency (50 Hz). However, using space vector-based hybrid modulation for ANPC introduces several limitations on selecting the output vectors such as zero-vector that is generated by connecting all three phases to the positive DC rail. To deal with this issue, a modified hybrid SVM is utilized to adjust the voltages of the DC link. A prototype is made using Gallium-nitride (GaN) FETs and the modified SVM is implemented in a field programmable gate array (FPGA). To show that the modified SVM can control the DC link voltages, an experimental comparison is carried out between a carrier-based modulation and the modified SVM. 
 Download 
Filename:0568-epe2020-full-08543638.pdf
Filesize:685.8 KB
 Type   Members Only 
 Date   Last modified 2021-01-18 by System