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   Faster switching with less overvoltage - operating a SiC-MOSFET at its speed limit   [View] 
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 Author(s)   Pablo RODRIGUEZ DE MORA 
 Abstract   This paper explores the turn-off switching behavior of a third-generation SiC MOSFET encapsulated ina TO-247-4 package. The work is focused on the selection of the optimal gate resistance to reduce theturn-off switching losses. The selection criteria is based on the limitation of the inductive over-voltagepeak (OVPK) for the worst-case scenario i.e. maximum DC-link voltage and switched current. The gateresistance is tuned to induce the allowed OVPK, gradually, with decreasing gate resistance the switchinglosses would be reduced but the OVPK would increase. Contrary to the expected behavior, it is observedthat there exists a threshold value from which, the decrease of the gate resistor reduces the OVPK and, moreover, the turn-off losses do also decrease. 
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Filename:0283-epe2020-full-16331366.pdf
Filesize:3.185 MB
 Type   Members Only 
 Date   Last modified 2021-01-18 by System