| Abstract |
Power semiconductor devices are achieving high switching speed and high breakdown voltage. This improves inverter performance. But, as inverter improves, further challenge of dv/dt noise is generated that needs to be tackled by filter stage. Multilevel inverters can solve this challenge. But there are implementation complexity associated with multilevel topologies like requirement of multiple isolated DC source,complicated charging algorithm, dedicated sensing hardware. This paper presents a switch capacitor type converter topology enabling a dc-ac three level output. Joining multiple iteration of topology in daisy-chained configuration, the converter can achieve voltage gain with multilevel waveform. Requirement of a single DC supply, with inherent charge balancing capability on capacitor, the topology is well suited for low voltage renewable sources like photovoltaic (PV) or fuel cell. The paper presents design of high frequency commutation loop. Utilizing finite element analysis (FEA) tool ANSYS Electronics Desktop(Q3D) to extract PCB parasitics helps in eliminating prototyping cost and time. Designed inverter is then subjected to continuous load test where it shows improving performance with increasing inductive load. |
