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   A new SPICE model of VDMOS transistors   [View] 
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 Author(s)   V. d’Alessandro; F.Frisina; N. Rinaldi 
 Abstract   This paper presents a new electro-thermal analytical model of VDMOS transistors based on the combination of the Level 3 SPICE model for the intrinsic MOSFET and a simple expression for the drift resistance. It is shown that, despite its simplicity, the model provides a good prediction of the device behaviour in all operating modes over the temperature range [300K-400K], describing static device characteristics also in quasi-saturation conditions. Moreover, this model requires a simple parameter extraction procedure and is suitable to be implemented in the circuit simulator SPICE. 
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Filename:EPE2001 - PP00793 - Rinaldi.pdf
Filesize:121.2 KB
 Type   Members Only 
 Date   Last modified 2004-03-10 by System