| Abstract |
In the last few years, MOS transistors have been developed in order to achieve high power levels. The structure of these devices is somewhat different from that of the classical low power MOSFET transistor, and as a consequence the classical models (Sah, 1964) are not suited for the new power devices. Recent modelling approaches (Latreche and others, 1985), that represent accurately the behaviour of power MOS transistors, even at high levels of commutation, are oriented to the manufacturers and need technological parameters, that usually are not known by the circuit designers. In this paper we present an experimental method for the characterization of power MOS transistors in commutation that does not need any technological parameter. The method is based on the time domain analysis of the MOS transistor performance in commutation, when constant currents are injected into its terminals. The analysis of the time domain waveforms and the knowledge of the internal structure of the MOS devices allows the evaluation of the transistor capacitances. It is then possible to introduce a simple large-signal model for power MOSFETs that is particularly suited to the analysis of circuits using the MOS transistor in commutation (e.g. in switching power converters). We also present a camparison between the results obtained experimentally and by computer simulation, that confirm the accuracy of the proposed method. |
