| Filename: | 0251-epe2019-full-10410661.pdf |
| Filesize: | 4.148 MB |
| Mitigating Drain Source Voltage Oscillation for SiC Power MOSFETs in order to reduce Electromagnetic Interference | ||||||
| Author(s) | Patrick HOFSTETTER | |||||
| Abstract | In this paper various approaches are shown to mitigate drain source voltage oscillation at SiC MOSFET turn-off. At first, a MOSFET behavior model is presented and confirmed with measurement results. Based on this model, the suitability of oscillation mitigation methods is evaluated regarding effect, timing requirement and switching losses. | |||||
| Download |
|
|||||
| Type | Members Only | |||||
| Date | Last modified 2020-08-14 by System | |||||
| |
||||||