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Gate Voltage Fluctuation Reduction in Fast-switching Operation for Uninterruptible Power System with SiC-MOSFET
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| Author(s) |
Hiroshi KAMIZUMA |
| Abstract |
A low noise gate drive architecture for uninterruptible power systems with SiC-MOSFET was developed. An active miller clamp circuit with dumping resistance was applied to the gate drive circuits to reduce gate voltage fluctuation caused by common source inductance in fast-switching operation. As a result, a 200 V / 20 kVA UPS achieves high efficiency of 93.7\%. |
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| Filename: | 0382-epe2019-full-15593897.pdf |
| Filesize: | 3.054 MB |
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| Type |
Members Only |
| Date |
Last modified 2020-08-14 by System |
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