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AUTOMATIC CODE GENERATION & ARCHITECTURE CONFIGURATION FOR A HIGH PERFORMANCE TRANSPUTER-BASED UNIVERSAL CONTROLLER
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| Author(s) |
R. G. Harley; M. J. Van Der Westhuizen; M. R. Webster; D. C. Levy |
| Abstract |
High software costs and low software reliability are often used as an argument against the use of digital controllers for motion control. This paper shows that there is a possibility of automating the code generation process for a high performance digital controller based on the transputer. Due to the increasing sophistication of real-time software, software engineers have started to use CASE tools (Computer Assisted Software Engineering) to alleviate this problem. These tools are not widely available yet and therefore a need was identified for a system that can translate a high level specification, typically a control block diagram edited on a graphical, icon-based interface, to executable code which is suitable for multiprocessor execution. The system comprises three main parts; a graphical icon-based editor, a Serial/Parallel Load Analysis Tool (SPLAT) and a code generator that uses the output of SPLAT to generale the executable code. The SPLAT is used to parallelise the algorithm and to determine an optimised architecture configuration for the multiprocessor controller. |
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| Filename: | Unnamed file |
| Filesize: | 2.812 MB |
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| Type |
Members Only |
| Date |
Last modified 2019-08-08 by System |
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