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TWO-DIMENSIONAL TURN-OFF PROCESS SIMULATION OF A GTO WITH REALISTIC RLC LOAD
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| Author(s) |
M. Turowski; A. Napieralski; J. M. Dorkel |
| Abstract |
In this paper, a discussion of load circuit influence on internal behaviour of GTO structure and on external wave-forms of the circuit is presented. The simulation was performed with realistic RLC load circuit, and the obtained waveforms were compared with experimental results. Obtained results show that the peak of power density (i.e. possible hot spot) remains located in the same place inside the structure throughout the whole turn-off process. These results show the importance of GTO structure design as a function of external load conditions and the possibility of hot spots occurrence under the cathode contact. The presented numerical results were obtained with the use of a personal computer 2-D device simulation program solving the full set of time dependent semiconductor equations using the finite boxes method. |
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| Filename: | Unnamed file |
| Filesize: | 2.979 MB |
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| Type |
Members Only |
| Date |
Last modified 2019-07-17 by System |
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