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Analisis of DC link capacitor volt. balan. in multilevel active filter
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| Author(s) |
R. Strzelecki; G. Benysek; J. Rusiñski; E. Kot |
| Abstract |
This paper presents results of simulation of a three-phase parallel active power filter implemented
with: -three and five level diode clamped (DC) inverter; -isolated series h-bridge (ISHB) three and five
level inverter. There will be clarified effect of voltage unbalance on active power filter's source
element, and discussed how to avoid this problem. In the paper there will be presented behavior of the
active power filters (APF), implemented with counted upper inverters, in case of sudden changes of
the load. We will also discuss influence of different voltage balancing algorithms on APF behavior. |
| Download |
| Filename: | EPE2001 - PP00077 - Benysek.pdf |
| Filesize: | 248.7 KB |
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| Type |
Members Only |
| Date |
Last modified 2004-03-10 by System |
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