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Elimination of Low Order Harmonics in a 3-Level Inverter Used for Stat
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| Author(s) |
L. Ran; L. Holdsworth; G. Putrus |
| Abstract |
This paper is concerned with the harmonic absorption of DC side capacitors in a 3-level inverter
operated as an ASVC. The effects of the load level and the switching pattern are analysed. It is shown
that the DC voltage ripple will affect the AC side harmonic spectrum. Requirements to eliminate the
dominant 3rd harmonic absorption are identified. A switching strategy to control the DC side
harmonics and an expanded system configuration are investigated. A new dynamic selective harmonic
elimination modulation method (SHEM) is described to improve the inverter output voltage; the
switching angles to track the operating point are derived. The analysis is illustrated using simulation
and experiment. |
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| Filename: | EPE2001 - PP00188 - Ran.pdf |
| Filesize: | 139.8 KB |
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| Type |
Members Only |
| Date |
Last modified 2004-03-15 by System |
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