| Abstract |
In power converter configurations like multi-cell, multi-level, series connection of power devices etc.under very high switching speeds, several dv/dt sources generated at different floating points produceconducted EMI perturbations from the power part to the control part through the many gate drivercircuitries. The modifications of the parasitic capacitive propagation paths between the power and thecontrol sides have impacts on the circulating current produced by high dv/dt, which, in turns, affects thevoltages distributions (static and transient) among the power devices. This paper presents newsarchitectures for gate drivers power supplies implementations in series connection to minimize parasiticcurrents, especially reducing the common mode currents and to minimize the unbalance voltages of SiCMOSFET devices in series connections. Simulations and experiments validate the advantages of thegate driver power supplies proposed architectures on the common mode currents and drain-to-sourcevoltages of series-connected devices. |
