| Abstract |
This paper investigates performance of a selective harmonic elimination method utilizing pulse pattern modulation scheme in multi-drive configuration under different unbalance grid conditions, which include both the amplitude-unbalance and angle-unbalance in the three-phase grid voltage. In order to prevent from loss of synchronization during unbalanced events, a Phase Locked Loop (PLL) structure is proposed, and consequently the appropriate firing angle compensation can be applied based on the different PLLs including the Second Order Generalized Integrator (SOGI)-PLL and Dual SOGI (DSOGI)-PLL. The performance of the considered multi-drive system along with different PLL structures is evaluated through simulation and experimental measurements. |
