| |
A DESIGN OF A NEW SNUBBER CIRCUIT FOR THREE-LEVEL GATE TURN-OFF THYRISTOR INVERTERS
| [View]
[Download]
|
| Author(s) |
J.H. Suh; B. S. Suh; D.S. Hyun |
| Abstract |
A new low loss snubber circuit including overvoltage clamping circuit for three-level GTO inverter is presented. The proposed snubber circuit is effective in restriction of the dv/dt and the overvoltage values of each GTO at turn-off and the snubber loss is less than the half that of the conventional RCD snubber circuit. In addition, there is no blocking voltage balancing problem between the inner and outer GTOs that occurs in the case that conventional RCD snubber circuit is used in three-level inverter. Experimental results demonstrate that the proposed snubber circuit is very effective for a large capacity three-level GTO inverter. |
| Download |
| Filename: | Unnamed file |
| Filesize: | 574.5 KB |
|
| Type |
Members Only |
| Date |
Last modified 2018-05-17 by System |
| |
 |