| |
Investigation on Power Electronics Topologies for Inductive Power Transfer (IPT) Systems in High Power Low Voltage Applications
| [View]
[Download]
|
| Author(s) |
Marinus PETERSEN |
| Abstract |
In this contribution the optimal power electronics topology in SS-compensated IPT systems for Electric Vehicles (EVs) is investigated in terms of required rated semiconductor power and efficiency. The novelty of this paper is the focus on high power (sup. 1 kW) and low output voltage (inf. 100 V) applications. It is shown that the required semiconductor power which can be assumed to be proportional to the chipsize and thus the costs of a semiconductor device is roughly 10\% lower for the topology with primary DC/DC conversion than with secondary DC/DC conversion. Furthermore it is found that the topology with primary DC/DC conversion shows the highest overall efficiency, while the topology with secondary DC/DC conversion results in a better worst case efficiency. A general rule can be derived that the winding ratio for both topologies should be chosen as high as possible. |
| Download |
| Filename: | 0124-epe2015-full-17293068.pdf |
| Filesize: | 919.5 KB |
|
| Type |
Members Only |
| Date |
Last modified 2016-06-08 by System |
| |
 |