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ANALOG REAL-TIME MODEL OF A UNIFIED POWER FLOW CONTROLLER
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Author(s) |
M. M. de Oliveira; A. Ekström |
Abstract |
An scaled analog model of a Unified Power Flow Controller (UPFC) combined with conventional series capacitors for real-time simulation studies is presented. The combined simulated compensator is located in a transmission system with the purpose of controlling active and reactive power at the receiving bus. Digital Signal Processors (DSPs) are basically
used for controlling the shunt and series converters. The control system has been designed based on the principle of minimum dependence upon network parameters that might be changed in real applications. The system performance is verified under transient conditions, both at symmetrical and non-symmetrical operation. |
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Filename: | Unnamed file |
Filesize: | 606.7 KB |
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Type |
Members Only |
Date |
Last modified 2016-03-22 by System |
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