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ACTIVE VOLTAGE CLAMPING TECHNIQUES FOR OVERVOLTAGE PROTECTION OF MOS-CONTROLLED POWER TRANSISTORS
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Author(s) |
T. Reimann; R. Krümmer; J. Petzoldt |
Abstract |
Power electronic devices and switches in power converter circuits must be kept from destinction caused by inadmissible
high voltages. Different technical possibilities exist to prevent dangerous overvoltages. Besides the passive clamping and dynamic gate control (DGC) techniques the principle of active voltage clamping is very suitable and simple for power semiconductor device voltage protection. The principle of active voltage clamping is discussed in detail in this paper and different variants for the technical realization are introduced.
A very rugged zener element can be realized by using suppressor diodes together with an amplifying discrete IGBT. This configuration was tested successfully in both the periodic and aperiodic clamping mode with low and high clamping energies. |
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Filename: | Unnamed file |
Filesize: | 513 KB |
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Type |
Members Only |
Date |
Last modified 2016-03-15 by System |
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