| Abstract |
To show the implementation advantages coming from the application of a new harmonic elimination methodology
previously proposed, the conceptual design of a low-level digital controller, that can be implemented employing less than 600 equivalent NAND-NOR elementary logic gates, is presented in detail. The controller implements a simple method that acts on the line voltages of a standard 3-phase VS! inverter in such a way to obtain a symmetric tern of alternative output waveforms not containing the harmonic families 5 and 7. The controller permits also the regulation in real-time of the fundamental component frequency and amplitude. A prototype logic circuit based on the proposed controller scheme is then presented with some experimental tests results, to prove the actual feasibility of a cheap implementation employing simple TIL standard ICs . The circuit is able to generate the 3 branch command signals up to over I kHz of output frequency, with a global error for the fundamental component amplitude lower than 0.5% of the DC bus voltage on the entire useful range. |
