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Supervisory Control for Interleaved Boost Converters using HiLeS Designer
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| Author(s) |
Harold CHAMORRO, Alonso GUTIERREZ, Fernando JIMENEZ |
| Abstract |
This paper presents the application of HiLeS (High Level Specification of Embedded Systems) formalism to design a supervisory controller based on FPGA for interleaved boost converters. This controller is intended to increase the versatility and efficiency of interleaved boost converters. Furthermore, the proposed supervisory controller uses Petri nets for structural analysis and stability. HiLeS-Designer tool, which is a platform based on HiLeS formalism, is used to design and implement the supervisory controller in embedded hardware. This approach uses the digital component of VHDL-AMS code generated by the HiLeS-Designer tool to implement the supervisory controller in FPGA. Simulations and experimental results show that the pro-posed control strategy increases the operating range and efficien-cy of interleaved boost converters. |
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| Filename: | 0057-epe2014-full-13534390.pdf |
| Filesize: | 398.1 KB |
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| Type |
Members Only |
| Date |
Last modified 2015-06-08 by System |
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