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Frequency Response Analysis of Proposed Digital Control System for DPWM-POL
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| Author(s) |
Kenji MII, Daisuke KANEMOTO, Tamotsu NINOMIYA, Yoichi ISHIZUKA |
| Abstract |
This paper will discuss about the proposed hardware logic type digital controller for on-board SMPS which has a very small time-delay in control loop. Experimental results of the load current change experiment and the frequency characteristic of open loop transfer function has been described respectively. These results reveal the validity of the proposed technique. |
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| Filename: | 0509-epe2013-full-07403495.pdf |
| Filesize: | 943.3 KB |
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| Type |
Members Only |
| Date |
Last modified 2014-02-09 by System |
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