| |
FPGA realization of reconfigurable IP-core function for real-time induction motor model
| [View]
[Download]
|
| Author(s) |
L. Charaabi; E. Monmasson; I. Slama-Belkhodja; J-P. Louis |
| Abstract |
This paper presents a new circuit realization of induction motor model using Field Programmable Gate
Array (FPGA) device. The proposed model can be realized using only single FPGA (XC2s100) from
Xilinx, Inc. To develop an efficient IP-Core function of this model, authors apply a methodology that offers
a considerable hardware design advantage and allows its reconfiguration in real time. The proposed method
starts with simulation in order to formulate the specification model. This is followed by the circuit synthesis
for the development of the implementation model. Simulation and experimental results are given to verify
the implemented model. |
| Download |
| Filename: | EPE2003-PP0399 - Charaabi |
| Filesize: | 218.2 KB |
|
| Type |
Members Only |
| Date |
Last modified 2003-10-13 by Unknown |
| |
 |