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   PWM-Based Control of a Cascaded Three-Phase Multilevel Inverter   [View] 
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 Author(s)   António MARTINS, Emanuel MEIRELES, Adriano CARVALHO 
 Abstract   The modular structure of the multilevel inverter and the Field-Programmable Gate Array (FPGA) architecture make a perfect match. Three-phase cascaded H-bridge multilevel inverters require a large number of control signals and the flexibility of the FPGA appears as the right solution to generate the control signals for the multilevel inverter. This paper presents the analysis and design of a FPGA-based multi-carrier PWM for a five-level three-phase inverter and shows PSIM-based simulation results and experimental data demonstrating the expected theoretical results. 
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Filename:0317-epe2011-full-13265012.pdf
Filesize:930.7 KB
 Type   Members Only 
 Date   Last modified 2012-01-26 by System