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Design and Analysis of a Bus Bar Structure for a Medium Voltage Inverter
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| Author(s) |
Masato ANDO, Keiji WADA, Kazuto TAKAO, Takeo KANAI, Shinichi NISHIZAWA, Hiromichi OHASHI |
| Abstract |
In order to suppress overvoltage of power devices and noise voltages of inverters, it is essential to analyze the DC-side inductance of the inverter. This paper presents a design procedure of an optimumstructure for a 10-kV, 400-kVA three-level inverter. Rather than using 3D-FEM software, the bus barinductance for the medium voltage inverter is calculated based on a partial inductance method. An inductance map is useful for determining the relationship between the bus bar structure and the inductancevalue and for designing the low-inductance structure. In addition, the calculation results of the bus barinductance correspond to the measurement results, confirming the validity of the proposed method. |
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| Filename: | 0501-epe2011-full-12364939.pdf |
| Filesize: | 687.4 KB |
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| Type |
Members Only |
| Date |
Last modified 2012-01-26 by System |
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