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   A Hold-up Time Extending Method for Asymmetrical Half-bridge Converter   [View] 
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 Author(s)   Jintae KIM, Li SHANMEI 
 Abstract   For asymmetric half-bridge converters, one of drawbacks is pretty narrow input voltage range, whose reasons are a leakage inductance for ZVS, its switches configuration and a blocking capacitor for clamping power switches with the input voltage. Therefore a hold-up time is more quite restricted for others. In this paper, it will be analyzed for a voltage conversion ratio of the converter. And a way to extend hold-up time for the converter will be shown. Finally, an asymmetrical half-bridge converter will be tested with 24V / 8A of output specification to verify the way. 
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Filename:0707-epe2011-full-09400056.pdf
Filesize:627.5 KB
 Type   Members Only 
 Date   Last modified 2012-01-26 by System