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Dynamic Junction Temperature Calculation and Measurement by Four-Pole Theory and Complex Fourier Series
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| Author(s) |
Thomas KOMMA, Walter KIFFE |
| Abstract |
The development of power supply technology has always been associated with the need for further miniaturization. This means that power semiconductors must be mounted at short distances on the same heat sink. Adjacent power semiconductors have an increasing influence on the chip temperature. The maximum junction temperatures, which are specified by the manufacturer under all operating conditions, may not be exceeded. As a rule, the chip temperatures are calculated on the basis of the losses and thermal impedance of a power semiconductor according to manufacturer’s specifications. The following paper presents a procedure for determining the junction temperatures of power semiconductors in switch-mode power supplies, considering common heat-sink and arbitrary power-loss functions. |
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| Filename: | 0814-epe2009-full-14241501.pdf |
| Filesize: | 575.8 KB |
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| Type |
Members Only |
| Date |
Last modified 2010-01-27 by System |
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