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Design, Tuning and Testing of a Flexible PLL for Grid Synchronization of Three-Phase Power Converters
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| Author(s) |
Jon Are SUUL, Kjell LJØKELSØY, Tore UNDELAND |
| Abstract |
This paper is discussing a flexible three-phase Phase Locked Loop (PLL) with added functionality for grid voltage synchronization in a wide range of operating conditions. The presented structure is based on enhancing the well known Synchronous Reference Frame (SRF) PLL. Functions that modify the behaviour of the loop in order to handle large frequency and grid voltage deviations are also added. The PLL-structure is applicable for many applications with different control systems and different hardware, but is presented for grid synchronization of voltage source converters, with parts of the control system implemented in a Field Programmable Gate Array (FPGA). A simple tuning procedure based on analytical criteria has been developed and the system is analyzed in the frequency domain to verify the stability and illustrate the influence of the added functionality. Results from time-domain simulations and laboratory experiments are presented and discussed to verify the behaviour of the proposed PLL structure. |
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| Filename: | 0434-epe2009-full-02495067.pdf |
| Filesize: | 542.3 KB |
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| Type |
Members Only |
| Date |
Last modified 2010-01-27 by System |
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