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Interaction Between Thermal Impedance and Parasitics in Power Sections
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| Author(s) |
Stefan Förster |
| Abstract |
Considerations refer to thermal optimisation and its coherence with the appearance of electrical parasitics in power electronic systems. Analytical and finite element simulation assisted analysis of thermal resistance depending on geometry of layered assemblies is discussed. Resulting approach provides a basis for considerations on parasitics applying partial element equivalent circuit method (PEEC). |
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| Filename: | 282.pdf |
| Filesize: | 594.6 KB |
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| Type |
Members Only |
| Date |
Last modified 2008-12-07 by System |
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